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  advanced power n-channel enhancement mode electronics corp. power mosfet lower gate charge bv dss 20v capable of 2.5v gate drive r ds(on) 50m single drive requirement i d 4a rohs compliant & halogen-free description absolute maximum ratings symbol units v ds v v gs v i d @t a =25 a i d @t a =70 a i dm a p d @t a =25 w t stg t j symbol value unit rthj-a maximum thermal resistance, junction-ambient 3 100 /w data and specifications subject to change without notice 200910191 halogen-free product 1 -55 to 150 -55 to 150 AP9452AGG-HF parameter rating drain-source voltage 20 gate-source voltage + 12 continuous drain current, v gs @ 4.5v 3 4 continuous drain current, v gs @ 4.5v 3 2.5 pulsed drain current 1 12 total power dissipation 1.25 thermal data parameter storage temperature range operating junction temperature range advanced power mosfets from apec provide the designer with the best combination of fast switching, ruggedized device design, ultra low on-resistance and cost-effectiveness. g d s d g d s sot-89
electrical characteristics@t j =25 o c(unless otherwise specified) symbol parameter test conditions min. typ. max. units bv dss drain-source breakdown voltage v gs =0v, i d =250ua 20 - - v r ds(on) static drain-source on-resistance 2 v gs =10v, i d =4a - - 38 m ? v gs =4.5v, i d =4a - - 50 m ? v gs =2.5v, i d =3a - - 80 m ? v gs(th) gate threshold voltage v ds =v gs , i d =250ua 0.4 - 1.2 v g fs forward transconductance 2 v ds =5v, i d =3a - 12.6 - s i dss drain-source leakage current v ds =20v, v gs =0v - - 1 ua i gss gate-source leakage v gs = + 12v, v ds =0v - - + 100 na q g total gate charge 2 i d =4a - 7 11.2 nc q gs gate-source charge v ds =16v - 0.7 - nc q gd gate-drain ("miller") charge v gs =4.5v - 3.4 - nc t d(on) turn-on delay time 2 v ds =10v - 8 - ns t r rise time i d =1a - 9.5 - ns t d(off) turn-off delay time r g =3.3 , v gs =5v - 13 - ns t f fall time r d =10 -5- ns c iss input capacitance v gs =0v - 260 415 pf c oss output capacitance v ds =20v - 90 - pf c rss reverse transfer capacitance f=1.0mhz - 85 - pf r g gate resistance f=1.0mhz - 1.6 - source-drain diode symbol parameter test conditions min. typ. max. units v sd forward on voltage 2 i s =1a, v gs =0v - - 1.2 v t rr reverse recovery time 2 i s =2a, v gs =0 v , - 18.5 - ns q rr reverse recovery charge di/dt=100a/s - 9 - nc notes: 1.pulse width limited by max. junction temperature. 2.pulse test 3.surface mount on fr4 board, t < 10s. this product is sensitive to electrostatic discharge, please handle with caution. use of this product as a critical component in life support or other similar systems is not authorized. apec does not assume any liability arising out of the application or use of any product or circuit described herein; neither does it convey any license under its patent rights, nor the rights of others. apec reserves the right to make changes without further notice to any products herein to improve reliability, function or design. 2 AP9452AGG-HF
a p9452agg-h f fig 1. typical output characteristics fig 2. typical output characteristics fig 3. on-resistance v.s. gate voltage fig 4. normalized on-resistance v.s. junction temperature fig 5. forward characteristic of fig 6. gate threshold voltage v.s. reverse diode junction temperature 3 0 4 8 12 16 20 01234 v ds , drain-to-source voltage (v) i d , drain current (a) t a =25 o c 5.0v 4.5v 3.5v 2.5v v gs =2.0v 0 4 8 12 16 20 01234 v ds , drain-to-source voltage (v) i d , drain current (a) t a =150 o c 5.0v 4.5v 3.5v 2.5v v gs = 2.0 v 0.6 0.8 1.0 1.2 1.4 1.6 1.8 -50 0 50 100 150 t j , junction temperature ( o c) normalized r ds(on) v gs =4.5v i d =4a 0 1 2 3 4 0 0.2 0.4 0.6 0.8 1 1.2 1.4 v sd , source -to-drain voltage (v) i s (a) t j =25 o c t j =150 o c 0 0.4 0.8 1.2 1.6 -50 0 50 100 150 t j , junction temperature ( o c ) normalized v gs(th) (v) 25 27 29 31 33 35 37 123456 v gs , gate-to-source voltage (v) r ds(on) (m ) i d =3a t a =25 o c
AP9452AGG-HF fig 7. gate charge characteristics fig 8. typical capacitance characteristics fig 9. maximum safe operating area fig 10. effective transient thermal impedance fig 11. switching time waveform fig 12. gate charge waveform t d(on) t r t d(off) t f v ds v gs 10% 90% q v g 4.5v q gs q gd q g charge 0 2 4 6 8 024681012 q g , total gate charge (nc) v gs , gate to source voltage (v) i d =4a v ds =10v v ds =12v v ds =1 6 v 0.01 0.1 1 10 100 0.01 0.1 1 10 100 v ds , drain-to-source voltage (v) i d (a) t a =25 o c single pulse 100us 1ms 10ms 100ms 1s dc 0.01 0.1 1 0.00001 0.0001 0.001 0.01 0.1 1 10 t , pulse width (s) normalized thermal response (r thjc ) p dm duty factor = t/t peak t j = p dm x r thjc + t c rthja=100 /w t t 0.02 0.01 0.05 0.1 0.2 duty factor=0.5 single pulse 0 100 200 300 400 1 5 9 13172125 v ds , drain-to-source voltage (v) c (pf) f =1.0mhz c iss c oss c rss operation in this area limited by r ds(on)


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